Two articles, one in QST (January 2018) and one in the IEEE Spectrum https://spectrum.ieee.org/semiconductors/devices/the-high-school-student-whos-building-his-own-integrated-circuits describe how Sam Zeloof, KD2ENL, age 17, has built his own semiconductor fabrication facility following suggestions from Jeri Ellsworths YouTube channel https://www.youtube.com/user/jeriellsworth, where she demonstrated how she had made some home-brew silicon transistors. Sam is using a 10 micrometer feature size, well below the current state of the art. However, surplus equipment for that feature size is available inexpensively. He has built a few transistors and is targeting building a 4004 CPU as his next project.

I would have thought a 10 micron feature size was above state of the art. Feature size in common chips are typically in nanometres.

yes, but how do they taste?

Arts said:

yes, but how do they taste?

doped

But seriously, this is cool and good luck to him

Arts said:

yes, but how do they taste?

like chicken. if you put chicken salt on them.

dv said:

But seriously, this is cool and good luck to him

it is. and the female engineer is pretty cool too. in the linked video.

ChrispenEvan said:

Arts said:

yes, but how do they taste?

like chicken. if you put chicken salt on them.

:)

(polite applause)

Ah dear. I saw “Sam” and thought male. Should change her name to Pam so I don’t have this problem again.

dv said:

I would have thought a 10 micron feature size was above state of the art.

I thought that too. But I think the article is using “below” in terms of cutting edgeness rather than the feature size itself.

KJW said:

dv said:

I would have thought a 10 micron feature size was above state of the art.

I thought that too. But I think the article is using “below” in terms of cutting edgeness rather than the feature size itself.

Yeah I kind of figured that but I regard it as sloppy.

dv said:

KJW said:

dv said:

I would have thought a 10 micron feature size was above state of the art.

I thought that too. But I think the article is using “below” in terms of cutting edgeness rather than the feature size itself.

Yeah I kind of figured that but I regard it as sloppy.

I suppose this sort of thing is bound to happen when impressiveness increases with respect to a decrease in value, such as with race times, golf scores, cold temperatures, or vacuum pressures.

One way to build your own chips is using a field-programmable gate array FPGA. “:A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence field-programmable”. Available, I think, at a 14 nm resolution.

But that’s not the same as in the OP.

“His equipment includes a high-temperature furnace, a vacuum chamber built from surplus parts, and a scanning electron microscope. … To pattern the circuits on his chips, Zeloof uses a trick not available in the 1970s: He’s modified a digital video projector by adding a miniaturizing optical stage. He can then create a mask as a digital image and project it onto a wafer to expose a photoresist. … he is aiming to build a clone of the ur-microprocessor, the Intel 4004, released in 1971. “It’s got about 2,000 transistors at 10 micrometers.”

One of the better DIY projects I’ve seen – up there on a par with building your own cyclotron.